Many power amplifiers are used in environments in which the amount of power of the transmitted signal must be within a specified range. For example, federal agencies like the Federal Communications Commission (FCC) restrict the amount of power permissible in a signal transmitted in wireless LAN communications. Power detection in circuits that include power amplifiers in such controlled environments is critical to ensuring that the power of the transmitted signals are compliant with FCC regulations.
Accurate power detection in power amplifiers can be challenging, especially when the load condition on the output of the power amplifier changes over time, such as when the user of a cell phone moves from outside of a building to inside of a building. The performance of the power amplifier changes with the new loading condition, and this performance change must be reliably detected. Existing solutions for detecting power in power amplifiers can rely on printed circuit board (PCB) level directional couplers that are large and costly. Other existing solutions rely on power detection at the output of the power amplifier, which produces a significant amount of variation for detecting the forward power. Still other existing solutions rely on power detection at the input of the final gain stage of the power amplifier, but such an arrangement suffers from a dependent relationship between the power amplifier design and the detector and requires the power amplifier design to consider the design parameters of the detector, which limits the power amplifier capabilities.
Therefore, there is a need for improvements to power detection in power amplifiers that can be integrated in monolithic solutions, such as a standard CMOS/BiCMOS or GaAs process, that can be independent of power amplifier design parameters and provide a degree of freedom from the performance of the power amplifier without sacrificing the ability to accurately detect power in the output signal of the power amplifier.